Multifacet's general execution-driven multiprocessor simulator (GEMS) toolset

By Milo M. K. Martin, D. Sorin, Bradford M. Beckmann, Michael R. Marty, Min Xu, Alaa R. Alameldeen, Kevin E. Moore, Mark D. Hill, David A. Wood. CARN, 2005

1,665 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/49dc03814c171c08331fe9f1afc34a54951ae8e0

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Citations in the corpus

ZSim: fast and accurate microarchitectural simulation of thousand-core systems (2013, methodology): “Emulation is the natural choice when the simulated ISA is diﬀerent from the host’s, and many simulators choose it to be portable. gem5 [4, 5, 25], Flexus [51] and MARSS [29] are current representative emulation-based systems.”
A durable and energy efficient main memory using phase change memory technology (2009, methodology): “[28] Intel, Intel, STMicroelectronics Deliver Industry s First Phase Change Memory Prototypes, Intel News Release, Feb. 6, 2008, http://www.intel.com/pressroom/archive/releases/ 20080206corp.htm [29] Milo M. K. Martin, et al., Multifacet s General Execution-driven Multiprocessor Simulator (GEMS) ”
DRAMsim: a memory system simulator (2005, methodology): “This is a multi-processor simulation framework developed at the University of Wisconsin Madison [13].”
The gem5 simulator (2011, methodology): “Similar to its GEMS predecessor [9], SLICC performs all operations at a cache-block granularity.”
Cooperative Caching for Chip Multiprocessors (2006, methodology): “The cache simulator is a modified version of Ruby from the GEMS toolset [22].”
Hybrid transactional memory (2006, methodology): “This is a multiprocessor simulator based on Virtutech Simics [16], extended with customized memory models by Wisconsin GEMS [17], and further extended to simulate the unbounded LogTM architecture of Moore et al. [22].”
The gem5 Simulator: Version 20.0+ (2020, methodology): “1.1 The past, present, and future of gem5 The gem5 simulator was born when the m5 simulator [20] created at University of Michigan merged with the GEMS simulator [50] from University of Wisconsin.”
Sniper: Exploring the level of abstraction for scalable and accurate parallel multi-core simulation (2011, background): “Multifacet’s general execution-driven multiprocessor simulator (GEMS) toolset.”
McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures (2009, neutral): “We developed a manycore simulation infrastructure where a timing simulator and a functional simulator are decoupled, as in GEMS [28].”
LogTM: log-based transactional memory (2006, methodology): “The simulation framework uses Virtutech Simics [17] in conjunction with customized memory models built on Wisconsin GEMS [19, 31].”
Graphite: A distributed parallel simulator for multicores (2010, methodology): “GEMS uses their timing model to drive Simics one instruction at a time which results in much lower performance than Graphite.”