McPAT: An integrated power, area, and timing modeling framework for multicore and manycore architectures

By Sheng Li, Jung Ho Ahn, Richard D. Strong, Jay B. Brockman, Dean M. Tullsen, N. Jouppi. Micro, 2009

2,322 citations recorded by the source corpus.

Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Hardware and Architecture

View Paper: https://www.semanticscholar.org/paper/6899e8d373b29344c1b894fe6a41db258c9b9789

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Citations in the corpus

Understanding the Future of Energy Efficiency in Multi-Module GPUs (2019, methodology): “To achieve that most prior works take a bottom-up approach to power modeling; such as Leng et al. [15] that use a cycle-level architecture-level power model based on McPat [63].”
Planaria: Dynamic Architecture Fission for Spatial Multi-Tenant Acceleration of Deep Neural Networks (2020, background): “3 [70] and the energy cost estimated to be 0.”
PIM-enabled instructions: A low-overhead, locality-aware processing-in-memory architecture (2015, neutral): “2 [30], and an energy model from previous work [27], respectively.”
EnerJ: approximate data types for safe and general low-power computation (2011, background): “These estimations are based on three studies of architectural power consumption [5, 20, 27].”
DianNao: a small-footprint high-throughput accelerator for ubiquitous machine-learning (2014, methodology): “For the SIMD baseline, we use the GEM5+McPAT [28] combination.”
ACT: designing sustainable computer systems with an architectural carbon modeling tool (2022, methodology): “Compared to PPA optimized designs, carbon-aware design space exploration reduces the footprint of AI accelerators by up to 3× (Section 7).”
DSENT - A Tool Connecting Emerging Photonics with Electronics for Opto-Electronic Networks-on-Chip Modeling (2012, methodology): “Our method optimizes for minimum energy given a delay requirement, as opposed to logical-effort based approaches employed by existing models [18] [32] [33], which optimize for minimum delay, oblivious to energy.”
Energy characterization and instruction-level energy model of Intel's Xeon Phi processor (2013, methodology): “Activity Factor Simulator/ Profiler Wattch [2]/McPAT [7] (Out-of-Order) Tiwari [8] (Embedded) Performance Counters Isci [5] (Out-of-Order) This work (Xeon Phi) Analytical Perf.”
Architecture support for disciplined approximate programming (2012, methodology): “We extended CACTI [21] to model the dual-voltage SRAM structure we propose and incorporated the resulting models into McPAT [17].”
CACTI-P: Architecture-level modeling for SRAM-based structures with advanced leakage reduction techniques (2011, methodology): “McPAT [9], [10] uses the same analytical methodology to simultaneously model power, area, and timing of multicore and manycore processors.”
The gem5 Simulator: Version 20.0+ (2020, methodology): “Finally, we added an activity-based power modeling framework that measures key microarchitectural events, voltage, and frequency and allows detailed aggregation of power consumed over time similar to McPAT [44, 45].”
GPUWattch: enabling energy optimizations in GPGPUs (2013, methodology): “We validated the simulated power model’s average and runtime estimates against measured results using a comprehensive set of 25 real-world kernels that were not used to originally develop the power model.”