Mónico Linares Aranda
IEEE Transactions on Very Large Scale Integration (vlsi) Systems · 2011
A researcher in the Science corpus: 1 paper; trusts 3 researchers and is trusted by 0 researchers here, as inferred from the citation graph.
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Papers from Mónico Linares Aranda's perspective
Ordered by how strongly the researchers Mónico Linares Aranda trusts endorse each paper. Same corpus, a different order for every researcher.
- Performance analysis of low-power 1-bit CMOS full adder cells (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
- Low-voltage low-power CMOS full adder
- A review of 0.18-μm full adder performances for tree structured arithmetic circuits (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
- Design of Robust, Energy-Efficient Full Adders for Deep-Submicrometer Design Using Hybrid-CMOS Logic Style (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
- Design and analysis of low-power 10-transistor full adders using novel XOR-XNOR gates
- A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits
- Digital selection and analogue amplification coexist in a cortex-inspired silicon circuit
- Focal Onset Seizure Prediction Using Convolutional Networks (IEEE Transactions on Biomedical Engineering)
- Visualizing Data using t-SNE
- Physionet: Components of a New Research Resource for Complex Physiologic Signals". Circu-lation Vol
Their papers
- CMOS Full-Adders for Energy-Efficient Arithmetic Applications (2011) — 376 citations