Sumeer Goel
IEEE Transactions on Very Large Scale Integration (vlsi) Systems · 2006
A researcher in the Science corpus: 1 paper; trusts 5 researchers and is trusted by 2 researchers here, as inferred from the citation graph.
Whom Sumeer Goel trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Sumeer Goel overall
Papers from Sumeer Goel's perspective
Ordered by how strongly the researchers Sumeer Goel trusts endorse each paper. Same corpus, a different order for every researcher.
- Design and analysis of low-power 10-transistor full adders using novel XOR-XNOR gates
- Performance analysis of low-power 1-bit CMOS full adder cells (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
- Low-voltage low-power CMOS full adder
- A review of 0.18-/spl mu/m full adder performances for tree structured arithmetic circuits
- A review of 0.18-μm full adder performances for tree structured arithmetic circuits (IEEE Transactions on Very Large Scale Integration (vlsi) Systems)
- Pattern Classification
- Neural Networks for Pattern Recognition
- A Study of Cross-Validation and Bootstrap for Accuracy Estimation and Model Selection
- Practical optimization
- Pattern Recognition and Neural Networks