Martin Schläffer
Artificial Intelligence · 2011–2021
A researcher in the Science corpus: 2 papers; trusts 8 researchers and is trusted by 0 researchers here, as inferred from the citation graph.
Subfields
- Artificial Intelligence — 19 citations into it
- Computer Vision and Pattern Recognition — 13 citations into it
- Hardware and Architecture — 10 citations into it
Whom Martin Schläffer trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Papers from Martin Schläffer's perspective
Ordered by how strongly the researchers Martin Schläffer trusts endorse each paper. Same corpus, a different order for every researcher.
- An Implementation of DES and AES, Secure against Some Attacks (Workshop on Cryptographic Hardware and Embedded Systems)
- An ASIC Implementation of the AES SBoxes (The Cryptographer's Track at RSA Conference)
- Multiplicative Masking and Power Analysis of AES (Workshop on Cryptographic Hardware and Embedded Systems)
- Private Circuits: Securing Hardware against Probing Attacks (Annual International Cryptology Conference)
- A Side-Channel Analysis Resistant Description of the AES S-Box (Fast Software Encryption Workshop)
- Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints (Workshop on Cryptographic Hardware and Embedded Systems)
- A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation (Proceedings Design, Automation and Test in Europe Conference and Exhibition)
- Side-Channel Leakage of Masked CMOS Gates (The Cryptographer's Track at RSA Conference)
- Threshold Implementations Against Side-Channel Attacks and Glitches (International Conference on Information, Communications and Signal Processing)
- Securing the AES Finalists Against Power Analysis Attacks (Fast Software Encryption Workshop)
Their papers
- Ascon v1.2: Lightweight Authenticated Encryption and Hashing (2021) — 466 citations
- Secure Hardware Implementation of Nonlinear Functions in the Presence of Glitches (2011) — 326 citations