Side-Channel Leakage of Masked CMOS Gates
By Stefan Mangard, Thomas Popp, Berndt M. Gammel. The Cryptographer's Track at RSA Conference, 2005
364 citations recorded by the source corpus.
Subfields: Artificial Intelligence, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/dfa92cedab42b1b7c1f234df597ee2fa64f4c113
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Artificial Intelligence
- Emmanuel Prouff
- Matthieu Rivain
- Svetla Nikova
- Vincent Rijmen
- Martin Schläffer
- Norbert Pramstaller
- Stefan Mangard
- Christian Rechberger
In Hardware and Architecture
- Emmanuel Prouff
- Svetla Nikova
- Vincent Rijmen
- Matthieu Rivain
- Martin Schläffer
- Elisabeth Oswald
- Christian Rechberger
- Norbert Pramstaller
Citations in the corpus
- Successfully Attacking Masked AES Hardware Implementations (2005, methodology): “The fact that glitches lead to a side-channel leakage of masked gates has already been shown in [8] based on SPICE simulations.”
- Threshold Implementations Against Side-Channel Attacks and Glitches (2006, background): “Such an implementation of a linear transformation doesn’t leak information that can be used in a side-channel attack, even if presence of glitches is taken into account [15, 16].”
- KLEIN: A New Family of Lightweight Block Ciphers (2010, background): “The side-channel leakage of masked CMOS gates [34] exploits that it is not a trivial work to provide a secure hardware implementation.”
- The World is Not Enough: Another Look on Second-Order DPA (2010, background): “For example, masking can be defeated because of technological issues such as glitches [9].”
- Provably Secure Higher-Order Masking of AES (2010, background): “Secondly, masking at the hardware level is sensitive to glitches, which induces first-order flaws although in theory every internal wire carries values that are independent of the sensitive variables [20,21].”
- Domain-Oriented Masking: Compact Masked Hardware Implementations with Arbitrary Protection Order (2016, background): “For this reason, the classical boolean masking scheme is considered to be flawed [18].”
- Secure Hardware Implementation of Nonlinear Functions in the Presence of Glitches (2011, methodology): “Glitches have first been analyzed in [19] and a technique to model glitches has been presented in [35].”