Ben Jaiyen
Hardware and Architecture · 2012
A researcher in the Science corpus: 1 paper; trusts 1 researcher and is trusted by 1 researcher here, as inferred from the citation graph.
Subfields
- Hardware and Architecture — 8 citations into it; #1,032 of 1,551 by trust here, #993 by citations
- Computer Networks and Communications — 7 citations into it; #7,105 of 9,886 by trust here, #6,217 by citations
Whom Ben Jaiyen trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts Ben Jaiyen overall
Papers from Ben Jaiyen's perspective
Ordered by how strongly the researchers Ben Jaiyen trusts endorse each paper. Same corpus, a different order for every researcher.
- Pin: building customized program analysis tools with dynamic instrumentation (ACM-SIGPLAN Symposium on Programming Language Design and Implementation)
- Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems (USENIX Security Symposium)
- Symbiotic jobscheduling for a simultaneous mutlithreading processor (SIGP)
- Memory access scheduling (Proceedings of 27th International Symposium on Computer Architecture (IEEE Cat. No.RS00201))
- Space/time trade-offs in hash coding with allowable errors
- DRAMSim2: A Cycle Accurate Memory System Simulator (IEEE computer architecture letters)
- Stall-Time Fair Memory Access Scheduling for Chip Multiprocessors (Micro)
- Die Stacking (3D) Microarchitecture (Micro)
- ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers (International Symposium on High-Performance Computer Architecture)
- Flikker: saving DRAM refresh-power through critical data partitioning (ASPLOS XVI)
Their papers
- RAIDR: Retention-aware intelligent DRAM refresh (2012) — 545 citations