Pin: building customized program analysis tools with dynamic instrumentation
By Chi-Keung Luk, Robert S. Cohn, Robert Muth, Harish Patil, Artur Klauser, Geoff Lowney, Steven Wallace, Vijay Janappa Reddi, Kim M. Hazelwood. ACM-SIGPLAN Symposium on Programming Language Design and Implementation, 2005
4,533 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture, Software
View Paper: https://www.semanticscholar.org/paper/6de5a2f262cfeb6327af46e2066959a2320ffc9f
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Onur Mutlu
- Yoongu Kim
- Vivek Seshadri
- Christopher Krügel
- Thomas Moscibroda
- Mahmut Taylan Kandemir
- Ahmad-Reza Sadeghi
- Mor Harchol-Balter
In Hardware and Architecture
- Onur Mutlu
- Yoongu Kim
- Vivek Seshadri
- Thomas Moscibroda
- Mahmut Taylan Kandemir
- Mor Harchol-Balter
- Donghyuk Lee
- Ahmad-Reza Sadeghi
In Software
- Thorsten Holz
- Giovanni Vigna
- Robert Gawlik
- David Brumley
- Thanassis Avgerinos
- Yan Shoshitaishvili
- Ruoyu Wang
- Edward J. Schwartz
Citations in the corpus
- CollAFL: Path Sensitive Fuzzing (2018, methodology): “VUzzer [29] uses PIN to track block coverage.”
- Performance Measurement : Current Perspectives and Future Challenges (2006, neutral): “The simulator-based implementation was designed to let us experiment with collecting different events, and the Pin-based one to let us test LIME on larger input sets.”
- Translation Leak-aside Buffer: Defeating Cache Side-channel Protections with TLB Attacks (2018, methodology): “We instrument the code with the Intel Pin Dynamic Binary Instrumentation framework [39].”
- PIM-enabled instructions: A low-overhead, locality-aware processing-in-memory architecture (2015, methodology): “We use an in-house x86-64 simulator whose frontend is based on Pin [33].”
- Firmalice - Automatic Detection of Authentication Bypass Vulnerabilities in Binary Firmware (2015, methodology): “While a number of previous efforts have been focusing on analyzing binary applications on commodity software and hardware platforms, including general frameworks such as Valgrind [23], BitBlaze [28], and Pin[21], as well as symbolic execution based frameworks like AEG [29] and Mayhem [24], focusing ”
- ODR: output-deterministic replay for multicore debugging (2009, methodology): “ODR captures branches in software using the Pin binary instrumentation tool [15].”
- Jalangi: a selective record-replay and dynamic analysis framework for JavaScript (2013, methodology): “However, there exists no dynamic analysis framework for JavaScript similar to valgrind [20], PIN [16], or DynamoRIO [7] for x86.”
- The Cilk++ concurrency platform (2009, methodology): “As the application executes, Cilkscreen uses dynamic instrumentation [5, 19] to intercept every load and store executed at user level.”
- An Evaluation of High-Level Mechanistic Core Models (2014, methodology): “Sniper is an execution-driven, user-level simulator that uses functional-first simulation with timing feedback based on the Pin dynamic instrumentation framework [Luk et al. 2005] and the Graphite simulation infrastructure [Miller et al.”
- Oblivious Multi-Party Machine Learning on Trusted Processors (2016, methodology): “We ran each algorithm in a simulated SGX environment6 and used Intel’s Pin framework [42] to collect runtime traces that record all memory accesses of enclave code, not only including our core algorithms, but also all standard libraries and SGX framework code.”
- Flip-N-Write: A simple deterministic technique to improve PRAM write performance, energy and endurance (2009, methodology): “We generate traces using the PIN binary instrumentation infrastructure [13] to feed the simulator.”
- SHiP: Signature-based Hit Predictor for high performance caching (2011, methodology): “CMP$im: APin-based on-the-.y multi-core cache simulator.”
- Memory Performance Attacks: Denial of Memory Service in Multi-Core Systems (2007, methodology): “1 Experimental Methodology We evaluate our solution using a detailed processor and memo ry system simulator based on the Pin dynamic binary instrumentation tool [18].”
- ILR: Where'd My Gadgets Go? (2012, background): “We believe that a per-process virtual machine (PVM) is the best choice for the ILR VM since it can be easily deployed and has low performance and runtime overheads [11, 18, 19].”