Vincent Rijmen
Artificial Intelligence · 2001–2015
A researcher in the Science corpus: 8 papers; trusts 12 researchers and is trusted by 34 researchers here, as inferred from the citation graph.
Subfields
- Artificial Intelligence — 46 citations into it; #5,061 of 35,345 by trust here, #9,557 by citations
- Computer Vision and Pattern Recognition — 35 citations into it; #11,242 of 21,575 by trust here, #12,992 by citations
- Hardware and Architecture — 24 citations into it; #992 of 1,551 by trust here, #828 by citations
Whom Vincent Rijmen trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
- Stefan Mangard
- Johannes Wolkerstorfer
- Elisabeth Oswald
- David Canright
- Johannes Blömer
- Thomas Popp
- Mehdi-Laurent Akkar
- Mario Lamberger
Who trusts Vincent Rijmen overall
- Christophe De Cannière
- Matthieu Rivain
- Alex Biryukov
- Andrey Bogdanov
- Roel Maes
- D. Page
- Matteo Maffei
- Axel York Poschmann
- Dmitry Khovratovich
- Gregor Leander
Papers from Vincent Rijmen's perspective
Ordered by how strongly the researchers Vincent Rijmen trusts endorse each paper. Same corpus, a different order for every researcher.
- A Compact Rijndael Hardware Architecture with S-Box Optimization (International Conference on the Theory and Application of Cryptology and Information Security)
- Using Second-Order Power Analysis to Attack DPA Resistant Software (Workshop on Cryptographic Hardware and Embedded Systems)
- An ASIC Implementation of the AES SBoxes (The Cryptographer's Track at RSA Conference)
- An Implementation of DES and AES, Secure against Some Attacks (Workshop on Cryptographic Hardware and Embedded Systems)
- A Side-Channel Analysis Resistant Description of the AES S-Box (Fast Software Encryption Workshop)
- Masked Dual-Rail Pre-charge Logic: DPA-Resistance Without Routing Constraints (Workshop on Cryptographic Hardware and Embedded Systems)
- Private Circuits: Securing Hardware against Probing Attacks (Annual International Cryptology Conference)
- Securing the AES Finalists Against Power Analysis Attacks (Fast Software Encryption Workshop)
- A logic level design methodology for a secure DPA resistant ASIC or FPGA implementation (Proceedings Design, Automation and Test in Europe Conference and Exhibition)
- Pushing the Limits: A Very Compact and a Threshold Implementation of AES (International Conference on the Theory and Application of Cryptographic Techniques)
Their papers
- RECTANGLE: a bit-slice lightweight block cipher suitable for multiple platforms (2015) — 377 citations
- Secure Hardware Implementation of Nonlinear Functions in the Presence of Glitches (2011) — 326 citations
- Threshold Implementations Against Side-Channel Attacks and Glitches (2006) — 554 citations
- A Side-Channel Analysis Resistant Description of the AES S-Box (2005) — 353 citations
- AES implementation on a grain of sand (2005) — 438 citations
- The Design of Rijndael (2002) — 2,252 citations
- The Design of Rijndael: AES - The Advanced Encryption Standard (2002) — 3,981 citations
- Rijndael, the advanced encryption standard (2001) — 310 citations