Intrinsic threshold voltage fluctuations in decanano MOSFETs due to local oxide thickness variations
By Asen Asenov, Savas Kaya, John H. Davies. 2002
223 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/db12b87e64f341274005106cff23ee10a5992384
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In Electrical and Electronic Engineering
- Asen Asenov
- Andrew R. Brown
- Gareth Roy
- Savas Kaya
- John H. Davies
- Fikru Adamu-Lema
- Scott Roy
- Enrico Sangiorgi
Citations in the corpus
- Physically based modeling of low field electron mobility in ultrathin single- and double-gate SOI n-MOSFETs (2003, background): “The scaling of the conventional, bulk MOSFETs to this range of channel lengths is extremely hard and requires doping concentrations well above cm [2]‐[4], that degrade effective mobility ( ) [5], [6], result in large source/drain to bulk capacitances, and, given the very small channel areas, can ind”
- Simulation of intrinsic parameter fluctuations in decananometer and nanometer-scale MOSFETs (2003, methodology): “ulation study of this kind [89] are constructed using standard assumptions for the autocorrelation function of the interface roughness.”
- Poly-Si-Gate-Related Variability in Decananometer MOSFETs With Conventional Architecture (2007, background): “Such sources include random discrete dopants [7]–[9], line-edge roughness (LER) [10]–[12], interface roughness and oxide thickness variations [13], and the high-κ gate dielectric morphology [14], [15].”
- A Self-Consistent Full 3-D Real-Space NEGF Simulator for Studying Nonperturbative Effects in Nano-MOSFETs (2007, methodology): “[20], our interface model is compatible with atomic-level (step) discretization of the interface profile.”
- Simulation Study of Individual and Combined Sources of Intrinsic Parameter Fluctuations in Conventional Nano-MOSFETs (2006, background): “The simulation results are presented in Section IV, and the conclusions from the whole study are drawn in Section V.”