Poly-Si-Gate-Related Variability in Decananometer MOSFETs With Conventional Architecture

By Andrew R. Brown, Gareth Roy, Asen Asenov. IEEE Transactions on Electron Devices, 2007

143 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/52bde89ca68208c9cf62d9fde93248dd79820446

How researchers see this paper

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In Electrical and Electronic Engineering

1. Martin D. Giles
2. Kelin J. Kuhn
3. Roza Kotlyar
4. Bevan M. Baas
5. Aaron Stillmaker
6. Qiang Li
7. Kei May Lau

Citations in the corpus

• Process Technology Variation (2011, background): “strain [wafer-level biaxial [21], high-stress capping layers [22], and embedded silicon–germanium (SiGe) [23]], and variation associated with gate material granularity (poly gates [24] and”