Overview of Beyond-CMOS Devices and a Uniform Methodology for Their Benchmarking
By Dmitri E. Nikonov, Ian A. Young. Proceedings of the IEEE, 2013
493 citations recorded by the source corpus.
Multiple logic devices are presently under study within the Nanoelectronic Research Initiative (NRI) to carry the development of integrated circuits beyond the complementary metal-oxide-semiconductor (CMOS) roadmap. Structure and operational principles of these devices are described. Theories used for benchmarking these devices are overviewed, and a general methodology is described for consistent estimates of the circuit area, switching time, and energy. The results of the comparison of the NRI logic devices using these benchmarks are presented.
Subfields: Computational Theory and Mathematics, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/f941d48761f2355a76c67578188acf69680aea8d
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Citations in the corpus
- Tunnel Field-Effect Transistors: State-of-the-Art (2014, background): “contenders to outperform CMOS at low voltages [3], [4].”
- In-memory computing with resistive switching devices (2018, background): “On the other hand, the sequential cascade of two operations, where the first gate’s output is directly used as the second gate’s input, is impossible, as input and output signals are physically different 44 .”
- Towards Oxide Electronics: a Roadmap (2019, background): “benchmark, which included estimates of standby power, speed and energy for a wide set of circuits including an ALU [368].”
- The future of computing beyond Moore’s Law (2020, background): “However, Nikonov & Young [28] introduce us to the challenges of ‘Boltzmann’s tyranny’ for electronic devices, and also illustrate quantitatively just how far these technologies are from being a clear candidate for completely replacing CMOS as we know it.”
- The hardware lottery (2020, background): “There are also high risk efforts to explore the development of transistors using new materials (Colwell, 2013; Nikonov & Young, 2013).”