Analytic modeling of the bias temperature instability using capture/emission time maps
By Tibor Grasser, P. Wagner, Hans Reisinger, Thomas Aichinger, G. Pobegen, Michael Nelhiebel, Ben Kaczer. International Electron Devices Meeting, 2011
177 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/255ecea6f9410abe078588d4859e40b532df9e86
How researchers see this paper
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In Electrical and Electronic Engineering
- Tibor Grasser
- Souvik Mahapatra
- M. A. Alam
- Thomas Aichinger
- Wolfgang Gustin
- Hans Reisinger
- A. E. Islam
- Shashank Gupta
Citations in the corpus
- A Comparative Study of Different Physics-Based NBTI Models (2013, methodology): “and, later, by using a multistate transition model [49], [51]; the semipermanent component is empirically determined [50].”
- Review on SiC MOSFETs High-Voltage Device Reliability Focusing on Threshold Voltage Instability (2019, methodology): “4, the technique using commercial analyzers with several pairs of stress and recovery sequences is perfectly able to extract CETs [29] and as such enables the possibility to analytically model the stress and recovery time dependence of the threshold voltage shift by CET maps (see also Section V).”