Nanowire transistors without junctions.

By Jean-Pierre Colinge, Chi-Woo Lee, A. Afzalian, N. Akhavan, Ran Yan, Isabelle Ferain, P. Razavi, B. O'Neill, A. Blake, M. White and 3 more. Nature Nanotechnology, 2010

2,286 citations recorded by the source corpus.

Subfields: Biomedical Engineering, Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/03e3b2a200ceb06ad3e33dc91c68c03a163dc775

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Citations in the corpus

Junctionless Tunnel Field Effect Transistor (2013, background): “Because of such stringent demands, the scaling of MOSFET will soon reach its fundamental limits.”
Enhanced Electrostatic Integrity of Short-Channel Junctionless Transistor With High- $\kappa$ Spacers (2011, methodology): “device simulated are well calibrated with experimental JLT data from [2] and were listed in our previous work [5].”
Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistors (2011, background): “The electrostatic control of the channel by the gate is so efficient in such gate architectures that it is even possible to fabricate a MOSFET device without forming p–n junctions between the source, the channel region and the drai”
Variability Impact of Random Dopant Fluctuation on Nanoscale Junctionless FinFETs (2012, background): “Previous investigations have suggested that JL-FETs are inherently more sensitive to fluctuations in baseline channel doping levels than equivalent inversion-mode field-effect transistors (FETs) [2], [5].”
Scaling of Trigate Junctionless Nanowire MOSFET With Gate Length Down to 13 nm (2012, background): “channel is necessary to turn off the device [10].”
Junctionless nanowire transistor (JNT): Properties and design guidelines (2010, background): “Junctionless fabrication process is greatly simplified, compared to standard CMOS since there are no doping concentration gradients in the device.[1-3]”
Sensitivity of Threshold Voltage to Nanowire Width Variation in Junctionless Transistors (2011, background): “Recently, the junctionless transistor has been reported to avoid these problems [4], [ 5 ].”
A Full-Range Drain Current Model for Double-Gate Junctionless Transistors (2011, background): “Hence, a new device, called a junctionless (JL) transistor [1], has been proposed to alleviate the aforementioned problems.”
A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs (2012, background): “Recently, the JL MOSFET has been shown as an attractive device in RF analog [3] and memory digital circuits [4] because a JL transistor possesses excellent turn-on and output characteristics [5], [6]; a nearly ideal subthreshold swing; a large ON-current, which is quite comparable to that of an undo”
Modeling and Simulation Investigation of Sensitivity of Symmetric Split Gate Junctionless FET for Biosensing Application (2017, background): “In the current research, MOSFET dimensions have continuously been scaled down giving rise to short channel effects (SCEs) which seriously affect the device behavior [14], [15].”
Theory of the Junctionless Nanowire FET (2011, methodology): “The fabricated devices exhibit excellent turn-on and output characteristics [16], [17] with a nearly ideal SS 60 mV/dec, a large ON-current, which is quite comparable with that of an undoped channel transistor with the same geometry, a very small drain-induced barrier lowering (DIBL), and an interes”
Charge-Plasma Based Process Variation Immune Junctionless Transistor (2014, background): “Therefore, a novel device has been suggested, which does not involves the formation of any junction, referred as the JLT, is made of uniformly and heavily doped silicon nanowires [1].”
Simple Analytical Bulk Current Model for Long-Channel Double-Gate Junctionless Transistors (2011, background): “However, the channel is much more heavily doped (∼10(19) cm−3) in a junctionless transistor [2].”
Junctionless Multiple-Gate Transistors for Analog Applications (2011, background): “A solution to this problem has recently been proposed in the form of a novel structure called the “junctionless (JL) multiple gate transistor” [8]–[10], which exhibits an unconven-”