Simple Analytical Bulk Current Model for Long-Channel Double-Gate Junctionless Transistors

By Juan Pablo Duarte, Sung-Jin Choi, Dong-il Moon, Yang-Kyu Choi. IEEE Electron Device Letters, 2011

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A Dual-Material Gate Junctionless Transistor With High- $k$ Spacer for Enhanced Analog Performance (2014, methodology): “Calibration of our simulated ID–VGS characteristics for SMG DGJLT with [16] at L = 1 μm, Tsi = 10 nm, Tox = 7 nm, ND = 1 × 1019 cm−3, L S /L D = 10 nm, and VDS = 50 mV.”
A Full-Range Drain Current Model for Double-Gate Junctionless Transistors (2011, background): “Recently, an analytic model for DG-JLFETs has been proposed [5].”
A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs (2012, background): “Several references in the literature have reported the analytical model for JL double-gate MOSFETs [7]–[10] and JL surroundinggate MOSFETs [11]–[13], all of which only focus on analyzing the long-channel characteristics and cannot predict the shortchannel behavior when the devices are pushed into a ”