Ran Ginosar
Computer Networks and Communications · 2004
A researcher in the Science corpus: 1 paper; trusts 3 researchers and is trusted by 0 researchers here, as inferred from the citation graph.
Subfields
- Computer Networks and Communications — 5 citations into it
- Hardware and Architecture — 5 citations into it
Whom Ran Ginosar trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Papers from Ran Ginosar's perspective
Ordered by how strongly the researchers Ran Ginosar trusts endorse each paper. Same corpus, a different order for every researcher.
- Networks on Chips: A New SoC Paradigm (Computer)
- Route packets, not wires: on-chip interconnection networks (Proceedings - Design Automation Conference)
- Addressing the system-on-a-chip interconnect woes through communication-based design (Proceedings - Design Automation Conference)
- A network on chip architecture and design methodology (Proceedings IEEE Computer Society Annual Symposium on VLSI. New Paradigms for VLSI Systems Design. ISVLSI 2002)
- Network on Chip : An architecture for billion transistor era
- A generic architecture for on-chip packet-switched interconnections (Proceedings Design, Automation and Test in Europe Conference and Exhibition 2000 (Cat. No. PR00537))
- The torus routing chip (Distributed computing)
- In-datacenter performance analysis of a tensor processing unit
- The future of wires (Proceedings of the IEEE)
- Gradient-based learning applied to document recognition
Their papers
- QNoC: QoS architecture and design process for network on chip (2004) — 598 citations