James D. Balfour
Computer Networks and Communications · 2007–2013
A researcher in the Science corpus: 2 papers; trusts 3 researchers and is trusted by 2 researchers here, as inferred from the citation graph.
Subfields
- Computer Networks and Communications — 14 citations into it; #7,314 of 9,886 by trust here, #7,832 by citations
Whom James D. Balfour trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Who trusts James D. Balfour overall
Papers from James D. Balfour's perspective
Ordered by how strongly the researchers James D. Balfour trusts endorse each paper. Same corpus, a different order for every researcher.
- Route packets, not wires: on-chip interconnection networks (Proceedings - Design Automation Conference)
- Analysis of power consumption on switch fabrics in network routers (Proceedings - Design Automation Conference)
- Flattened Butterfly Topology for On-Chip Networks (Micro)
- ViChaR: A Dynamic Virtual Channel Regulator for Network-on-Chip Routers (Micro)
- GARNET: A detailed on-chip network model inside a full-system simulator (IEEE International Symposium on Performance Analysis of Systems and Software)
- An 80-Tile 1.28TFLOPS Network-on-Chip in 65nm CMOS (2007 IEEE International Solid-State Circuits Conference. Digest of Technical Papers)
- On-Chip Interconnection Architecture of the Tile Processor (IEEE Micro)
- Principles and Practices of Interconnection Networks
- The gem5 simulator (CARN)
- Analyzing CUDA workloads using a detailed GPU simulator (IEEE International Symposium on Performance Analysis of Systems and Software)
Their papers
- A detailed and flexible cycle-accurate Network-on-Chip simulator (2013) — 802 citations
- Flattened Butterfly Topology for On-Chip Networks (2007) — 475 citations