Self-Optimizing Memory Controllers: A Reinforcement Learning Approach
By Engin Ipek, Onur Mutlu, José F. Martínez, R. Caruana. International Symposium on Computer Architecture, 2008
522 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/ecf5fd423c117ffb87730d75a473bc05beaae2b8
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Onur Mutlu
- Yoongu Kim
- Vivek Seshadri
- Rachata Ausavarungnirun
- Donghyuk Lee
- Jamie Liu
- Michael A. Kozuch
- Todd C. Mowry
In Electrical and Electronic Engineering
- Onur Mutlu
- Yoongu Kim
- Mor Harchol-Balter
- Rachata Ausavarungnirun
- Zhe Chen
- Frede Blaabjerg
- Donghyuk Lee
- Dongsu Han
In Hardware and Architecture
- Onur Mutlu
- Yoongu Kim
- Donghyuk Lee
- Vivek Seshadri
- Rachata Ausavarungnirun
- Jamie Liu
- Mor Harchol-Balter
- Michael A. Kozuch
Citations in the corpus
- Page placement in hybrid memory systems (2011, methodology): “For example, to improve access throughput, the MC may choose to buffer particular requests (e.g., LLC write-backs) and/or reorder requests according to the system’s current state [3, 17, 30].”
- ATLAS: A scalable and high-performance scheduling algorithm for multiple memory controllers (2010, methodology): “Other scheduling algorithms [17, 55, 30, 56, 18, 37, 58, 50, 22] have been proposed to improve DRAM throughput in single-threaded, multi-threaded, or streaming systems.”
- Reinforcement learning improves behaviour from evaluative feedback (2015, background): “In applications such as learning to manage memory resources in a central processing unit, decisions need to be made at the speed of a computer’s clock and data are abundant, making temporal difference learning an excellent fit 28 .”
- Online Machine Learning in Big Data Streams (2018, methodology): “t learns action-values is Sarsa [213]. For each sequence S t;A t;S t+1;A t+1, the algorithm updates its estimates by Q(S t;A t) (1 a)Q(S t;A t)+a(R t +gQ(S t+1;A t+1)): Sarsa was successfully used by [121] for optimizing a DRAM memory controller. The value prediction algorithms above were described ”
- A case for exploiting subarray-level parallelism (SALP) in DRAM (2012, background): “, [6, 16, 23, 24, 38, 40, 41, 43]) that prioritize certain favorable requests in the memory controller to improve system performance and/or fairness.”
- Thread Cluster Memory Scheduling: Exploiting Differences in Memory Access Behavior (2010, background): “Memory controller designs that do not distinguish between different threads [28, 19, 25, 9, 3 , 20, 15] have been examined within the context of single-threaded, vector, or streaming architectures.”
- RowClone: Fast and energy-efficient in-DRAM bulk data copy and initialization (2013, background): “First, the available memory bandwidth between the processor and main memory is not growing or expected to grow commensurately with the compute bandwidth available in modern multi-core processors [22, 25].”
- Reinforcement Learning and Its Applications in Modern Power and Energy Systems: A Review (2020, background): “Owing to these advantages, RL has been widely ap‐ plied in industrial manufacturing [19], operation and schedul‐ ing [20], robotic control [21], etc.”