Digital Single Event Transient Trends With Technology Node Scaling
By J. M. Benedetto, P. Eaton, D. Mavis, M. Gadlage, T. Turflinger. IEEE Transactions on Nuclear Science, 2006
142 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/d48575db47bd6986cf6472af4e4accc903f475a5
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Electrical and Electronic Engineering
- Pascale Gouker
- Véronique Ferlet-Cavrois
- Lloyd W. Massengill
- J. Benedetto
- R. Lacoe
- D. Fleetwood
- Paul E. Dodd
Citations in the corpus
- Characterization of Digital Single Event Transient Pulse-Widths in 130-nm and 90-nm CMOS Technologies (2007, background): “The observable pulse-width is a function of not only the base technology, but the circuit topology through which it propagates [12], and the circuit operating parameters (such as supply voltage [11]).”
- A Bias-Dependent Single-Event Compact Model Implemented Into BSIM4 and a 90 nm CMOS Process Design Kit (2009, background): “With transient pulse widths approaching the period of GHz clock cycles, the time width of the pulse has become a key metric of circuit response [ 4 ], [5].”
- Single Event Transients in Digital CMOS—A Review (2013, background): “Several papers characterized the SET sensitivity of new technologies using broad beams of heavy ions [36]–[40].”