Low-Temperature Sintering with Nano-Silver Paste in Die-Attached Interconnection

By Tao Wang, Xu Chen, Guo-Quan Lu, G. Lei. 2007

339 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/ada90f65c9bcf9e9bcc194b00f9f112e9ac762bd

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Xu Chen
2. D. Henry
3. Laurent Mendizabal
4. Guo-Quan Lu
5. Kim S. Siow
6. Kuan Yew Cheong
7. Vemal Raja Manikam
8. J. Calata

Citations in the corpus

• Applying Anand model to low-temperature sintered nanoscale silver paste chip attachment (2009, background): “[5] made a research on low-temperature sintering process of nano-silver paste.”
• Survey of High-Temperature Reliability of Power Electronics Packaging Components (2015, background): “The typical thermal conductivity values of the sintered joint are about fivefolds higher than conventional solders [52] and vary in the range of 200 to 300 W(mK)−1 [49], [53]–[55].”