Modeling of nanoscale gate-all-around MOSFETs

By David Jiménez, J. Sáenz, B. Iñíguez, Jordi Suñé, L. Marsal, J. Pallarès. IEEE Electron Device Letters, 2004

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Analytical Model of the Threshold Voltage and Subthreshold Swing of Undoped Cylindrical Gate-All-Around-Based MOSFETs (2007, methodology): “The solution for the 1-D potential term φ0(r) is given by [5], [19], [20]”
Continuous analytic I-V model for surrounding-gate MOSFETs (2004, background): “Equation (1) can be analytically solved yielding [5]–[7]”
Theory of the Junctionless Nanowire FET (2011, methodology): “) is missing [1], and requires instead a numerical procedure.”
Analytic Model for the Surface Potential and Drain Current in Negative Capacitance Field-Effect Transistors (2010, methodology): “For the sake of simplicity, a double-gate (DG) geometry was assumed, although the model can be extended to a single-gate or surrounding-gate geometry [4]–[6].”
Explicit continuous model for long-channel undoped surrounding gate MOSFETs (2005, background): “THE surrounding-gate (SGT) MOSFET is one of the most promising candidates for the downscaling of CMOS technology toward the nanometer channel length range, since the surrounding gate allows an excellent control of the channel charge in the silicon film, reducing short-channel effects [1]–[3].”