On the generation and recovery of interface traps in MOSFETs subjected to NBTI, FN, and HCI stress

By Souvik Mahapatra, D. Saha, D. Varghese, Pawan Kumar. IEEE Transactions on Electron Devices, 2006

200 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/ee0fc25f701f8a1ac2bea8fb9362c87d6b29779e

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

1. Wenping Wang
2. Haldun Kufluoglu
3. Dhanoop Varghese
4. Yu Cao
5. Souvik Mahapatra
6. M. A. Alam
7. Rakesh Vattikonda
8. Sarma B. K. Vrudhula

Citations in the corpus

• A comprehensive model for PMOS NBTI degradation: Recent progress (2007, background): “[26] that if the number of broken Si–O bonds are small – as is the case for low VD ICs of current and future ITRS nodes [45] – a very simple analysis based on solution of Eqs.”
• Compact Modeling and Simulation of Circuit Reliability for 65-nm CMOS Technology (2007, background): “reactions can be positive holes in NBTI or hot electrons in CHC [21].”
• The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis (2010, background): “Experimental data further indicates that NBTI worsens exponentially with thinner gate oxide and higher operating temperature [7]–[11].”