Junctionless multigate field-effect transistor
By Chi-Woo Lee, A. Afzalian, N. Akhavan, Ran Yan, Isabelle Ferain, Jean-Pierre Colinge. 2009
906 citations recorded by the source corpus.
Subfields: Biomedical Engineering, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/ecf27cd708ac54afe7ae4ae51693eb0690c30a04
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Biomedical Engineering
- Mridula Gupta
- Manoj Saxena
- Rakhi Narang
- Suresh Gundapaneni
- Anil Kottantharayil
- S. Ganguly
- Te-Kuang Chiang
- Yang-Kyu Choi
In Electrical and Electronic Engineering
- Te-Kuang Chiang
- Roy P. Paily
- Ratul Kumar Baruah
- Suresh Gundapaneni
- Anil Kottantharayil
- S. Ganguly
- Mridula Gupta
- Manoj Saxena
Citations in the corpus
- Junctionless Tunnel Field Effect Transistor (2013, background): “JLFET shows better electrical properties and less variability than MOSFET, its subthreshold slope (SS) is still limited as in a MOSFET [4].”
- Simple Analytical Bulk Current Model for Long-Channel Double-Gate Junctionless Transistors (2011, background): “A S A RESPONSE to several problems resulting from the scaling of gate length in metal–oxide–semiconductor field-effect transistors (MOSFETs), junctionless (JL) transistors have recently been reported [1], [2] as an alternative device.”
- Modeling and Simulation Investigation of Sensitivity of Symmetric Split Gate Junctionless FET for Biosensing Application (2017, background): “[18], mentioned advantages of Junctionless MOSFET such as simple fabrication process, low gate leakage current and low DIBL than conventional MOSFET [19], [20].”
- Theory of the Junctionless Nanowire FET (2011, methodology): “The fabricated devices exhibit excellent turn-on and output characteristics [16], [17] with a nearly ideal SS 60 mV/dec, a large ON-current, which is quite comparable with that of an undoped channel transistor with the same geometry, a very small drain-induced barrier lowering (DIBL), and an interes”
- Gate-All-Around Junctionless Transistors With Heavily Doped Polysilicon Nanowire Channels (2011, background): “Such structure is basically an accumulation-mode transistor and also named junctionless (JL) transistor [7], [8] because, essentially, no junction is contained throughout the”
- Effect of Band-to-Band Tunneling on Junctionless Transistors (2012, methodology): “Although there are many studies that explore the physics of JLTs [1], [3], the effect of band-to-band tunneling (BTBT) on”
- Analysis of Threshold Voltage Variability Due to Random Dopant Fluctuations in Junctionless FETs (2012, background): “Recently, the junctionless (JL) transistor has been shown to avoid these problems [1], [2].”
- RF Performance and Small-Signal Parameter Extraction of Junctionless Silicon Nanowire MOSFETs (2011, background): “gate material with a high work function in order to achieve a positive Vth value [23].”
- Junctionless Multiple-Gate Transistors for Analog Applications (2011, neutral): “eliminates impurity diffusion-related problems [9].”
- A Quasi-Two-Dimensional Threshold Voltage Model for Short-Channel Junctionless Double-Gate MOSFETs (2012, background): “Recently, the JL MOSFET has been shown as an attractive device in RF analog [3] and memory digital circuits [4] because a JL transistor possesses excellent turn-on and output characteristics [5], [6]; a nearly ideal subthreshold swing; a large ON-current, which is quite comparable to that of an undo”
- Enhanced Electrostatic Integrity of Short-Channel Junctionless Transistor With High- $\kappa$ Spacers (2011, neutral): “tor (MOSFET) architecture for continued scaling [1]–[5].”