Toward Nanowire Electronics

By Joerg Appenzeller, Joachim Knoch, M. Björk, Heike E. Riel, H. Schmid, W. Riess. IEEE Transactions on Electron Devices, 2008

333 citations recorded by the source corpus.

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Modeling of High-Performance p-Type III–V Heterojunction Tunnel FETs (2010, background): “tail of the source Fermi function [7].”
Tunnel field-effect transistors as energy-efficient electronic switches (2011, background): “Whereas E g and m* depend solely on the material system, λ is strongly influenced by several parameters, such as the device geometry, dimensions, doping profiles and gate capacitanc”
Controlling nanowire structures through real time growth studies (2010, background): “It is also essential for devices such as tunnel or impact ionization field effect transistors (IFETs) [26].”
Metal-catalyzed semiconductor nanowires: a review on the control of growth directions (2010, neutral): “Semiconductor nanowires have garnered much attention over the past several years as promising nanotechnology building blocks that are expected to have a wide range of applications in areas such as photonics [1], electronics [2], nanoelectromechanical systems (NEMS) [3, 4] and the life sciences [5].”
Challenges and Limitations of CMOS Scaling for FinFET and Beyond Architectures (2019, background): “Nanosheet FET (NSFET) promises some advantage towards electrostatic improvements over FinFET, it is apparent that Nanowire FET (NWFET) will not suffer from SCEs even in sub-10 nm LGate regime [32].”