Key differences for process-induced uniaxial vs. substrate-induced biaxial stressed Si and Ge channel MOSFETs
By S. Thompson, G. Sun, K. Wu, Ji-Song Lim, Toshikazu Nishida. IEDM Technical Digest. IEEE International Electron Devices Meeting, 2004., 2004
173 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/a4c945accbec5e127b5a6a5836415fe37e87abd4
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In Electrical and Electronic Engineering
Citations in the corpus
- Strain: A Solution for Higher Carrier Mobility in Nanoscale MOSFETs (2009, background): “Mobility Enhancement of (100) and (110) pMOSFETs It has been theoretically and experimentally proven that <110> uniaxial compression is more beneficial for enhancing hole mobility than are other stresses (28).”
- Considerations for Ultimate CMOS Scaling (2012, background): “vertical field (in contrast to tensile biaxial strain where the gains are significantly reduced at a higher vertical field [98], [99], [102], [103]).”
- Uniaxial-process-induced strained-Si: extending the CMOS roadmap (2006, background): “For the 〈110〉 channel, the bulk versus MOSFET coefficients are close but do vary up to ∼ 50% for the values extracted in this and other works [18], [38].”
- In search of "Forever," continued transistor scaling one new material at a time (2005, background): “and an advantageously small nMOSFET threshold voltage shift [62].”