NoC synthesis flow for customized domain specific multiprocessor systems-on-chip
By Davide Bertozzi, Antoine Jalabert, Srinivasan Murali, Rutuparna Tamhankar, Stergios Stergiou, Luca Benini, Giovanni De Micheli. IEEE Transactions on Parallel and Distributed Systems, 2005
621 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/bb9263892b24b0e272015b0c3ab5ef288aa04de8
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Ümit Y. Ogras
- Li-Shiuan Peh
- Radu Marculescu
- Yatin Vasant Hoskote
- Natalie D. Enright Jerger
- Eby G. Friedman
- Vasilis F. Pavlidis
- Partha Pratim Pande
In Hardware and Architecture
- Ümit Y. Ogras
- Radu Marculescu
- Li-Shiuan Peh
- Natalie D. Enright Jerger
- Yatin Vasant Hoskote
- Eby G. Friedman
- Vasilis F. Pavlidis
Citations in the corpus
- Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives (2009, background): “The work in [16] chooses the NoC topology from a given topology library for various power/performance and area tradeoffs.”
- "It's a small world after all": NoC performance optimization via long-range link insertion (2006, background): “The need for scalable communication architectures is discussed in [4], [12], [18], [21], and [36], while several concrete NoC architectures are presented in [1], [3], [5], [6], [17], [24], and [26].”
- 3-D Topologies for Networks-on-Chip (2006, background): “The gate leakage component is due to current flowing through the gate oxide, denoted as .”