Linear programming based techniques for synthesis of network-on-chip architectures
By K. Srinivasan, Karam S. Chatha, Goran Konjevod. IEEE International Conference on Computer Design: VLSI in Computers and Processors, 2004. ICCD 2004. Proceedings., 2006
306 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Electrical and Electronic Engineering, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/40ee9f7d31ce2b34b3225b9ae62766ff36e3dae1
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Computer Networks and Communications
- Ümit Y. Ogras
- Radu Marculescu
- Li-Shiuan Peh
- Yatin Vasant Hoskote
- Natalie D. Enright Jerger
- Jingcao Hu
- Srinivasan Murali
- Giovanni De Micheli
In Electrical and Electronic Engineering
In Hardware and Architecture
- Ümit Y. Ogras
- Radu Marculescu
- Li-Shiuan Peh
- Natalie D. Enright Jerger
- Yatin Vasant Hoskote
- Jingcao Hu
Citations in the corpus
- "It's a small world after all": NoC performance optimization via long-range link insertion (2006, methodology): “[38] improve the overall system performance at the expense of altering the regularity of the grid structure.”
- Key research problems in NoC design: a holistic perspective (2005, background): “Besides having a paramount effect on the network latency, throughput, area, fault-tolerance and power consumption, the topology plays an important role in designing the routing strategy and mapping the cores to the network nodes [6-15].”
- Outstanding Research Problems in NoC Design: System, Microarchitecture, and Circuit Perspectives (2009, methodology): “Similarly, the work in [159] presents a mixedinteger-linear-programming-based technique for NoC topology synthesis with the objective of minimizing the power consumption subject to performance constraints.”