Pi-Gate SOI MOSFET

By J. T. Park, Jean-Pierre Colinge, Carlos H. Díaz. IEEE Electron Device Letters, 2001

271 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/2d73b8d193e93e9bbde32a47812a4eedfe6268b5

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In Electrical and Electronic Engineering

Citations in the corpus

High performance fully-depleted tri-gate CMOS transistors (2003, background): “Recently, non-planar tri-gate transistors were simulated [5] and they have also been reported to show fully depleted behavior at thickness dimensions greater than those of the single-gate FD”
Analysis of the parasitic S/D resistance in multiple-gate FETs (2005, background): “More refined members of this family of multiple-gate field-effect transistors (MuGFETs) are FinFETs [5], tri-gate FETs [6], Omega-FETs [7], Pi-gate FETs [8], and gate-all-around FETs Manuscript received November 5, 2004; revised February 17, 2005.”
High-performance fully depleted silicon nanowire (diameter /spl les/ 5 nm) gate-all-around CMOS devices (2006, background): “Among the many innovative approaches, double-gated FinFET [3], [4], tri-gated [5], Π-gated [6], Ω-gated [7], nanowire body [8]–[11], and gateall-around (GAA) [12]–[14] MOSFETs have attracted much”
Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistors (2011, background): “Improved versions of these feature either a field-induced pseudo-fourth gate, for example in Π-gate MOSFET”
Multiple-gate SOI MOSFETs: device design guidelines (2002, background): “Such multiple-gate devices include double-gate and triple-gate structures such as the quantum wire [6], the FinFET [7] and -channel SOI MOSFET [8], and quadruple-gate devices such as the gate all-around (GAA) device [9], the DELTA transistor [10], vertical pillar MOSFETs [11], and Pi-gate SOI MOSFET”
Considerations for Ultimate CMOS Scaling (2012, background): “below the channel [61]), and Omega-FETs (the gate not only”