Sunpyo Hong
Hardware and Architecture · 2009–2010
A researcher in the Science corpus: 3 papers; trusts 12 researchers and is trusted by 16 researchers here, as inferred from the citation graph.
Subfields
- Hardware and Architecture — 20 citations into it; #284 of 1,551 by trust here, #567 by citations
- Computer Networks and Communications — 17 citations into it; #2,457 of 9,886 by trust here, #3,753 by citations
Whom Sunpyo Hong trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
- Michael D. Linderman
- John R. Nickolls
- Jamison D. Collins
- Erik Lindholm
- Ali Bakhoda
- Hong Wang
- Hyesoon Kim
- Teresa Huai-Ying Meng
- Kevin Skadron
- Ian Buck
Who trusts Sunpyo Hong overall
- Akhil Arunkumar
- Fabian Schuiki
- Yi Yang
- Shuai Che
- Akshitha Sriraman
- Hyesoon Kim
- Evgeny Bolotin
- Michael Schaffner
- Ping Xiang
- Jeremy W. Sheaffer
Papers from Sunpyo Hong's perspective
Ordered by how strongly the researchers Sunpyo Hong trusts endorse each paper. Same corpus, a different order for every researcher.
- Scalable parallel programming
- The design and implementation of a first-generation CELL processor (ISSCC. 2005 IEEE International Digest of Technical Papers. Solid-State Circuits Conference, 2005.)
- A static power model for architects (Proceedings 33rd Annual IEEE/ACM International Symposium on Microarchitecture. MICRO-33 2000)
- NVIDIA Tesla: A Unified Graphics and Computing Architecture
- Program optimization space pruning for a multithreaded gpu (IEEE/ACM International Symposium on Code Generation and Optimization)
- HotLeakage: A Temperature-Aware Model of Subthreshold and Gate Leakage for Architects
- Analyzing CUDA workloads using a detailed GPU simulator (IEEE International Symposium on Performance Analysis of Systems and Software)
- An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness (International Symposium on Computer Architecture)
- OSKI: A library of automatically tuned sparse matrix kernels
- Single-ISA heterogeneous multi-core architectures: the potential for processor power reduction (Proceedings. 36th Annual IEEE/ACM International Symposium on Microarchitecture, 2003. MICRO-36.)
Their papers
- An integrated GPU power and performance model (2010) — 586 citations
- An analytical model for a GPU architecture with memory-level and thread-level parallelism awareness (2009) — 736 citations
- Qilin: Exploiting parallelism on heterogeneous multiprocessors with adaptive mapping (2009) — 599 citations