Investigation of the novel attributes of a fully depleted dual-material gate SOI MOSFET
By Anurag Chaudhry, Mamidala Jagadesh Kumar. IEEE Transactions on Electron Devices, 2004
135 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/b1c3269d5db93b7439e0b062ad5ee02ed11a2c6e
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In Electrical and Electronic Engineering
Citations in the corpus
- Novel Attributes of a Dual Material Gate Nanoscale Tunnel Field-Effect Transistor (2011, methodology): “[23] in a double-gate TFET (DGTFET) and demonstrate using”
- Influence of Channel and Gate Engineering on the Analog and RF Performance of DG MOSFETs (2010, unknown): “As reported in [ 18 ] about the optimization of DMG technology, the work functions of metals M1 (molybdenum) and M2 (aluminum) are taken as 4.55 and 4.1 eV, respectively, with equal lengths of L1 and”
- A Junctionless Nanowire Transistor With a Dual-Material Gate (2012, methodology): “It has been incorporated into bulk MOSFETs, silicon-on-insulator (SOI) devices, and double-gate MOSFETs, achieving simultaneous suppression of short-channel effects and enhancement of transconductance [9], [10], [14].”