Sub-10 nm carbon nanotube transistor

By Aaron D. Franklin, Shu-Jen Han, G. Tulevski, Mathieu Luisier, C. Breslin, L. Gignac, Mark S. Lundstrom, Wilfried E. Haensch. International Electron Devices Meeting, 2011

740 citations recorded by the source corpus.

This first demonstration of CNT transistors with channel lengths down to 9 nm shows substantially better scaling behavior than theoretically expected. Numerical simulations suggest that a possible explanation for the surprisingly good performance is a result of the gate modulating both the charge in the channel and in the contact regions. The unprecedented performance should ignite exciting new research into improving the purity and placement of nanotubes, as well as optimizing CNT transistor structure and integration. Results from aggressively scaling these molecular-channel transistors exhibit their strong suitability for a low-voltage, high-performance logic technology.

Subfields: Biomedical Engineering, Materials Chemistry

View Paper: https://www.semanticscholar.org/paper/a9d6bca64cd2d9d75946d11900b69c6dafc3746b

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Biomedical Engineering

In Materials Chemistry

Citations in the corpus

Towards Oxide Electronics: a Roadmap (2019, methodology): “This method has been well developed and nowadays structures smaller than 10 nm are being realized [109,110].”
Sub-10 nm fabrication: methods and applications (2021, methodology): “IBM researchers fabricated a 9 nm channel carbon nanotube (CNT) transistor using edge lithography [170], as shown in figure 18(b).”
Three-dimensional integration of nanotechnologies for computing and data storage on a single chip (2017, methodology): “However, this is not a fundamental challenge, and highly scaled CNFETs have previously been experimentally demonstrated 2,28 .”
Scaling equations for the accurate prediction of CMOS device performance from 180 nm to 7 nm (2017, methodology): “This will of course be further complicated in the not so distant future beyond CMOS, when it becomes commercially viable to use different devices for continued performance gains, such as nano-electromechanical (NEM) devices [15], carbon nanotube transistors [16], or nanowire transistors [11, 17].”
Carbon nanotube computer (2013, background): “Hence,CNTsareanexcitingcomplementtoexisting semiconductortechnologies 1,2 .”
A Compact Virtual-Source Model for Carbon Nanotube FETs in the Sub-10-nm Regime—Part I: Intrinsic Elements (2015, methodology): “In [24], vxo = 3 ×107 cm/s was extracted from a CNTFET with Lg = 9 nm [3], smaller than the vxo = 3.”