Fringing fields in sub-0.1 μm fully depleted SOI MOSFETs: optimization of the device architecture
By T. Ernst, C. Tinella, C. Raynaud, S. Cristoloveanu. 2002
153 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/657fc483b976794dc0a1cc21d420de5436dcda19
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In Electrical and Electronic Engineering
Citations in the corpus
- Statistical variability and reliability in nanoscale FinFETs (2011, background): “Relatively thin buried oxide (BOX) and high substrate doping are chosen to decouple drain-induced fringing fields and achieve optimal electrostatic integrity and short-channel effects [5].”
- RF Performance and Small-Signal Parameter Extraction of Junctionless Silicon Nanowire MOSFETs (2011, background): “insulator MOSFETs [8]–[10], and silicon nanowire (SNW) MOSFETs [11]–[21] have been proposed as the solutions”