Conductive bridging RAM (CBRAM): an emerging non-volatile memory technology scalable to sub 20nm
By M. Kund, Gerhard Beitel, C. Pinnow, Thomas Röhr, J. Schumann, R. Symanczyk, K. Ufert, Gerhard Müller. IEEE InternationalElectron Devices Meeting, 2005. IEDM Technical Digest., 2005
270 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/3f0acdcb1b0518ed4fe7ed8240249bf1b0c201e7
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In Electrical and Electronic Engineering
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Citations in the corpus
- Present and Future Non-Volatile Memories for Space (2010, background): “grammable Metallization Cells (PMC) or Solid Electrolyte (SE) Memory, is under development [178].”
- Memristor Emulator for Memristor Circuit Applications (2012, methodology): “[13] had built memristors using Ag and Si in a sandwiched layer and reported their performances as analog memories.”
- Compact Modeling of Conducting-Bridge Random-Access Memory (CBRAM) (2011, background): “(CBRAM), also named programmable metallization cell or solid-electrolyte memory technology, is promising for future nonvolatile memory device application due to the properties of fast speed ( 1 ]–[3].”
- State of the art of metal oxide memristor devices (2016, background): “An example model is depicted in cationic devices (ECM) having a different insulator system when compared to metal oxides, such as in the case of Ag/Ag-GeSe/Pt electrochemical cell [41].”
- Resistive Switching Properties of $\hbox{Au}/ \hbox{ZrO}_{2}/\hbox{Ag}$ Structure for Low-Voltage Nonvolatile Memory Applications (2010, unknown): “current in RRAM devices [5], [8], [9].”
- Resistive switching memories based on metal oxides: mechanisms, reliability and scaling (2016, background): “Reported electrolyte materials for CBRAM include chalcogenides, such as GeSe [62] and GeS2 [29], and oxides, such as GdOx [63], ZrOx [64] and Al2O3 [65].”
- Nanoionics-based resistive switching memories. (2007, unknown): “The state of the art with respect to non-volatile memories is demonstrated by Ag/GeSe x /W cells integrated into 90-nm CMOS technolog”
- Study of Multilevel Programming in Programmable Metallization Cell (PMC) Memory (2009, background): “resistance in a range spanning up to 3 orders of magnitude [10].”
- Electrochemical metallization memories—fundamentals, applications, prospects (2011, methodology): “In particular, Cu2S-based cells [41] have been successfully fabricated and operated down to 30 nm in diameter, and Gex Sey-based [15] and GdOx -based [13] cells down to just 20 nm.”