Scaling analysis of phase-change memory technology

By A. Pirovano, A. L. Lacaita, A. Benvenuti, F. Pellizzer, S. Hudgens, R. Bez. IEEE International Electron Devices Meeting 2003, 2003

274 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering, Electronic, Optical and Magnetic Materials, Materials Chemistry

View Paper: https://www.semanticscholar.org/paper/13f25c93c084b1901bfb31fca1abfd279bccaac1

How researchers see this paper

The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.

In Electrical and Electronic Engineering

In Electronic, Optical and Magnetic Materials

In Materials Chemistry

Citations in the corpus

Interfacial phase-change memory. (2011, methodology): “[9] Taketoshi, N.”
Architecting phase change memory as a scalable dram alternative (2009, unknown): “In future, FET scaling and large voltage drops across the cell will adversely aﬀect gate oxide reliability for unselected wordlines [22].”
Overview of emerging nonvolatile memory technologies (2014, unknown): “, crystalline and amorphous) [102,103].”
A durable and energy efficient main memory using phase change memory technology (2009, background): “Also the scaling rule of a diode is not so clear as NMOS [22].”
Breaking the Speed Limits of Phase-Change Memory (2012, background): “In that work, the scaling limitation of PCRAM can be divided into three spatial ranges: (1) phasechange material critical-nucleus limitation; (2) cell limitation; and (3) array limitation.”
Phase-Change Technology and the Future of Main Memory (2010, background): “BJTs are faster and can scale more robustly without this vulnerability.(8,9) Diodes occupy smaller areas and potentially enable greater cell densities but require higher operating voltages.”
Phase change memory technology (2010, methodology): “showed with careful thermal simulations that, at least out to the 65nm node, the thermal crosstalk between cells should remain low enough that 10-year lifetime will not be significantly reduced by write disturbs from neighboring cells[41].”
PDRAM: A hybrid PRAM and DRAM main memory system (2009, methodology): “For a fair comparison, the values are down scaled for 78nm technology based on the rules described in [16].”
Phase-Change Memory—Towards a Storage-Class Memory (2017, background): “3, the energy required for the reset operation shows an inverse scaling relationship [5] with the contact area and feature size of the PCM [26].”
Novel /spl mu/trench phase-change memory cell for embedded and stand-alone non-volatile memory applications (2004, methodology): “The integration of a compact PCM cell structure and of the chalcogenide materials and the full compatibility with an advanced CMOS technology are key aspects to bc demonstrated together with the optimization of the programming current [1, 2 ].”
Data-intensive applications, challenges, techniques and technologies: A survey on Big Data (2014, background): “In addition, the under-developing storage technologies, such as solid-state drive (SSD) [73] and phase-change memory (PCM) [144], may help us alleviate the difficulties, but they are far from enough.”