Multiple-gate SOI MOSFETs

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Explicit Continuous Models for Double-Gate and Surrounding-Gate MOSFETs (2007, background): “S BULK CMOS scaling [1], [2] is approaching the limit that is imposed by gate oxide tunneling, body doping, band-to-band tunneling, etc., multiple-gate MOSFETs [ 3 ] have been proposed to scale down CMOS technology more aggressively.”
Continuous analytic I-V model for surrounding-gate MOSFETs (2004, background): “In order to complete the model, SCE, quantum effects, low and high field transport, noise, and more, should be added.”
Radiation Effects in Advanced Multiple Gate and Silicon-on-Insulator Transistors (2013, background): “The combination of an undoped body with a multiple gate architecture offers great scaling potential [3], with a superior control of the short channel effects (SCEs).”
Scaling of Nanowire Transistors (2008, background): “, multiple-gate MOSFETs [17] have been proposed to extend the scaling to achieve even shorter channel length.”
Multigate transistors as the future of classical metal–oxide–semiconductor field-effect transistors (2011, background): “Figure 5 shows several examples of multigate devices, namely fin field-effect transistors (FinFETS), triple-gate (tri-gate) MOSFETS, gate-all-around MOSFETS (in which the gate electrode covers all sides of the channel region) and Π-gate and Ω-gate structures (which are so named because of the shape”