Xiaoyao Liang
Electrical and Electronic Engineering · 2007
A researcher in the Science corpus: 1 paper; trusts 2 researchers and is trusted by 0 researchers here, as inferred from the citation graph.
Subfields
- Electrical and Electronic Engineering — 8 citations into it
Whom Xiaoyao Liang trusts overall
Their strongest outbound trust, strongest first, inferred from their citations.
Papers from Xiaoyao Liang's perspective
Ordered by how strongly the researchers Xiaoyao Liang trusts endorse each paper. Same corpus, a different order for every researcher.
- Automatically characterizing large scale program behavior (ASPLOS X)
- Impact of die-to-die and within-die parameter fluctuations on the maximum clock frequency distribution for gigascale integration (IEEE J. Solid State Circuits)
- Parameter variations and impact on circuits and microarchitecture (Proceedings - Design Automation Conference)
- New generation of predictive technology model for sub-45nm design exploration (IEEE International Symposium on Quality Electronic Design)
- The impact of intrinsic device fluctuations on CMOS SRAM cell stability (IEEE J. Solid State Circuits)
- New paradigm of predictive MOSFET and interconnect modeling for early circuit simulation (Proceedings of the IEEE Custom Integrated Circuits Conference)
- Learning the k in k-means (Neural Information Processing Systems)
- Managing multi-configuration hardware via dynamic working set analysis (Proceedings 29th Annual International Symposium on Computer Architecture)
- Phase tracking and prediction (30th Annual International Symposium on Computer Architecture, 2003. Proceedings.)
- Experiments with Random Projection (Conference on Uncertainty in Artificial Intelligence)
Their papers
- Process Variation Tolerant 3T1D-Based Cache Architectures (2007) — 323 citations