Impact of MOSFET gate oxide breakdown on digital circuit operation and reliability

By Ben Kaczer, R. Degraeve, G. Groeseneken, M. Rasras, S. Kubicek, E. Vandamme, G. Badenes. 2000

269 citations recorded by the source corpus.

Subfields: Electrical and Electronic Engineering

View Paper: https://www.semanticscholar.org/paper/fe5c7583408c77a060e975ddbe9ecd6bc3c20148

How researchers see this paper

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In Electrical and Electronic Engineering

1. Jin Qin
2. Xiaojun Li
3. Joseph B. Bernstein
4. Ben Kaczer
5. Tibor Grasser

Citations in the corpus

• Review on high-k dielectrics reliability issues (2005, methodology): “that the post-BD resistance is high enough [38], the separate consideration of soft (SBD), progressive (PBD) and hard (HBD) breakdown events is necessary to set up an adequate applicationspecific reliability assessment methodology.”
• Consistent model for short-channel nMOSFET after hard gate oxide breakdown (2002, methodology): “An example of such assessment is the explanation of the ring oscillator operation continuing after many hard gate oxide breakdowns occurring in the circuit [ 3 ].”
• Compact Modeling of MOSFET Wearout Mechanisms for Circuit-Reliability Simulation (2008, methodology): “This model has been used in a CMOS ring-oscillator oxidebreakdown analysis [ 48 ].”