A 28nm HKMG super low power embedded NVM technology based on ferroelectric FETs
By M. Trentzsch, S. Flachowsky, Ralf Richter, Jan Paul, Berthold Reimer, Dirk Utess, S. Jansen, H. Mulaosmanovic, S. Müller, Stefan Slesazeck and 8 more. International Electron Devices Meeting, 2016
356 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Materials Chemistry
View Paper: https://www.semanticscholar.org/paper/f679047c266ef6e44014fa25b4bd970db8ba507f
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In Electrical and Electronic Engineering
- Daniele Ielmini
- Uwe Schroeder
- Thomas Mikolajick
- Abu Sebastian
- M. Le Gallo
- H. Philip Wong
- Stefan Slesazeck
- Patrick Polakowski
In Materials Chemistry
- Uwe Schroeder
- Thomas Mikolajick
- Stefan Slesazeck
- H. Philip Wong
- Abu Sebastian
- M. Le Gallo
- Patrick Polakowski
- Wei Dang Lu
Citations in the corpus
- In-memory computing with resistive switching devices (2018, background): “To gain a resistance change by ferroelectric switching, one should adopt a ferroelectric field-effect transistor (FeFET) structure with three terminals, where the change in dielectric polarization causes a variation in the resistance of the FeFET channel 35 .”
- Memristive technologies for data storage, computation, encryption, and radio-frequency communication (2022, background): “Global Foundries have recently demonstratedFeFETusing a 28-nmCMOS technology (51) as well as a 22-nm fully depleted siliconon-insulator process (52), but the endurance was only ~10(5) cycles.”
- The Past, the Present, and the Future of Ferroelectric Memories (2020, methodology): “However, a typical NVM endurance of about 105 write cycles is shown at the array level [71], [76].”
- High Endurance Ferroelectric Hafnium Oxide-Based FeFET Memory Without Retention Penalty (2018, methodology): “Highly scalable HfO2-based FeFET devices have been demonstrated [2] and are considered as a promising alternative for perovskite-based FeFETs due to their scalable implementation into CMOS technology [3], thereby providing fully compati-”