Spike-timing-dependent learning in memristive nanodevices
By G. Snider. 2008 IEEE International Symposium on Nanoscale Architectures, 2008
335 citations recorded by the source corpus.
Subfields: Cellular and Molecular Neuroscience, Cognitive Neuroscience, Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/f13bd8ba7576cefc07c8ab89de982c8734bb37f8
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Cellular and Molecular Neuroscience
- H. Philip Wong
- Shimeng Yu
- Giacomo Indiveri
- Daniele Ielmini
- Andy Thomas
- B. Linares‐Barranco
- Timothée Masquelier
- T. Serrano‐Gotarredona
In Cognitive Neuroscience
- Andy Thomas
- Kaushik Roy
- Timothée Masquelier
- Giacomo Indiveri
- H. Philip Wong
- Shimeng Yu
- B. Linares‐Barranco
- T. Serrano‐Gotarredona
In Electrical and Electronic Engineering
- Shimeng Yu
- H. Philip Wong
- Daniele Ielmini
- Andy Thomas
- Giacomo Indiveri
- Kaushik Roy
- Uwe Schroeder
- Timothée Masquelier
Citations in the corpus
- Spin-transfer torque magnetic memory as a stochastic memristive synapse (2014, positive): “devices to implement STDP [9], [11]–[14], [44], [53]–[57],”
- Evolution of Plastic Learning in Spiking Networks via Memristive Connections (2012, methodology): “follow [32], [42] in using discrete-time stepwise waveforms.”
- STDP and STDP variations with memristors for spiking neuromorphic learning systems (2013, background): “Even early proposals for memristor-based STDP learning implementations used artificial time-multiplexing to alternate continuously and synchronously between “performing” and “weight update” phases (Snider, 2008), thus requiring global system-wide synchronization.”
- On Spike-Timing-Dependent-Plasticity, Memristive Devices, and Building a Self-Learning Visual Cortex (2011, methodology): “The physical implementation of one such Feature Map with AER CMOS neurons and a layer of memristor crossbar structure on top is shown in Figure 21B (Snider, 2008).”
- An Electronic Synapse Device Based on Metal Oxide Resistive Switching Memory for Neuromorphic Computation (2011, methodology): “multiplexing (TDM) approach [37] can be used to design the shape of the spike to demonstrate the STDP behavior.”
- Towards spike-based machine intelligence with neuromorphic computing (2019, background): “Figure 6 illustrates how in situ synaptic efficacy and synaptic plasticity can be accomplished using emerging non-volatile memristive technologies, arranged in a crossbar fashion 103,104 .”
- Memristor-based neural networks (2013, background): “In 2008, the use of memristors to mimic biological mechanisms, such as STDP, was already hypothesized [76].”
- Evolving Spiking Networks with Variable Resistive Memories (2014, methodology): “The spike can be approximated by either a continuous (Afifi et al., 2009; Linares-Barranco and Serrano-Gotarredona, 2009) or discrete (Jo et al., 2010; Snider, 2008) waveform through time, which is transmitted to all synapses that the neuron is connected to (presynaptic or postsynaptic).”
- Integration of nanoscale memristor synapses in neuromorphic computing architectures (2013, background): “and post-synaptic spikes in a fully asynchronous manner, without any need for global or local synchronization, thus solving some of the problems that existed with previously proposed learning schemes [51,28]. The main idea is the following: when no spike is generated, each neuron maintains a constan”
- Towards Oxide Electronics: a Roadmap (2019, background): “Memristors synapses could play a major role in this field, since they also allow a direct implementation of unsu-pervised learning rules [454,455].”
- Towards evolving spiking networks with memristive synapses (2011, methodology): “Previous studies have presented methods to implement STDP learning using memristive synapses, notably [23-26].”
- The Fourth Element (2012, methodology): “Aside from serving as non-volatile memories [20], locally-passive memristors, have been used for switching electromagnetic devices [21], for field programmable logic arrays [22–26], for synaptic memories [27–29], for learning [30–32], etc.”