The Landscape of Parallel Computing Research: A View from Berkeley

By Krste Asanovic, Rastislav Bodík, Bryan Catanzaro, Joseph Gebis, Parry Husbands, Kurt Keutzer, David A. Patterson, W. Plishker, John M. Shalf, Samuel Williams and 1 more. 2006

2,459 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/ceb3fd01e1d5ece659654638e1c7cde2c4704a7a

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Citations in the corpus

Rodinia: A benchmark suite for heterogeneous computing (2009, methodology): “Each application or kernel is carefully chosen to represent different types of behavior according to the Berkeley dwarves [1].”
GraphLab: A Distributed Framework for Machine Learning in the Cloud (2011, methodology): “By focusing on Machine Learning we designed GraphLab, a domain speciﬁc parallel abstraction [6] that ﬁts the needs of the ML community, without sacriﬁcing computational efﬁ-ciency or requiring ML researchers to redesign their algorithms.”
The hardware lottery (2020, methodology): “This facilitates easier deployment by tailoring the program to achieve good performance and load balancing on a variety of hardware (Don-garra et al., 2018; Clint Whaley et al., 2001; Asanović et al., 2006; Ansel et al., 2014).”
Trends in big data analytics (2014, methodology): “Inspired by the seven dwarfs of numerical computation [11], Mehul Shah et al.”
Transactional memory (2010, methodology): “However, the software needs to be parallel as well as scalable in order to harvest the multicore performance potential [2, 3, 4].”
A characterization of the Rodinia benchmark suite with comparison to contemporary CMP workloads (2010, methodology): “Several approaches have been proposed for classifying applications based on their memory access and execution patterns , including the Berkeley Dwarves [1] .”
Optimization of sparse matrix-vector multiplication on emerging multicore platforms (2007, background): “This an encouraging outcome since the number of cores per chip is expected to continue increasing rapidly, while core performance is predicted to stay relatively flat [1].”
Corona: System Implications of Emerging Nanophotonic Technology (2008, unknown): “Power per core has been conservatively reduced by 5x (compared to the 6x predictions in [3]) and then increased by 20% to account for differences in the quadthreaded Corona.”
MachSuite: Benchmarks for accelerator design and customized architectures (2014, methodology): “Kernel/Algorithm Description Berkeley Dwarf [5] AES/AES AES encryption Combinational logic BACKPROP/BACKPROP Neural network training Unstructured grids BFS/BULK Breadth-first search Graph traversal BFS/QUEUE Breadth-first search Graph traversal FFT/STRIDED Fast Fourier transform Spectral methods FFT”
Fast support vector machine training and classification on graphics processors (2008, methodology): “Driven by the capabilities and limitations of modern semiconductor manufacturing, the computing industry is currently undergoing a massive shift towards parallel computing (Asanović et al., 2006).”
Cooperative Caching for Chip Multiprocessors (2006, background): “We leave their evaluation under large-scale CMPs for future work because evaluating large-scale CMPs is still an open research question [7, 65].”
Hogwild: A Lock-Free Approach to Parallelizing Stochastic Gradient Descent (2011, background): “The high rates achievable by multicore systems move the bottlenecks in parallel computation to synchronization (or locking) amongst the processors [2,13].”
Performance Analysis of Google Colaboratory as a Tool for Accelerating Deep Learning Applications (2018, methodology): “The speedup metric is calculated as follows [17]:”
The future of computing beyond Moore’s Law (2020, background): “To make this future of diverse accelerators usable and accessible in the former case will require the co-design of new compiler technology and domainspecific languages (DSLs) designed around the requirements of the target computational motifs (the 13 motifs that extended Phil Colella’s original Dwar”
Graphics processing unit (GPU) programming strategies and trends in GPU computing (2013, methodology): “Coupled with the memory wall and the ILP1 wall, serial computing had reached its zenith in performance [3], and CPUs started increasing performance through multicore and vector instructions instead.”
Exascale Computing Technology Challenges (2010, background): “Technology projections[1,2,3,9] indicate that clock-speeds will not change appreciably by 2018 and will remain near 1-2 GHz.”