Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0

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How researchers see this paper

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Architecting phase change memory as a scalable dram alternative (2009, positive): “Furthermore, we use CACTI to estimate energy consumed by peripheral circuitry to obtain approximately 2.5pJ of total array read energy per bit [18].”
Architecture support for disciplined approximate programming (2012, methodology): “We extended CACTI [21] to model the dual-voltage SRAM structure we propose and incorporated the resulting models into McPAT [17].”
Memory-centric accelerator design for Convolutional Neural Networks (2013, methodology): “We estimated the energy of data transfer for varying onchip memory size with a memory tracing tool [7], and did energy estimation for external [8] and on-chip [9] accesses.”
CACTI 6.0: A Tool to Model Large Caches (2009, background): “In the deep sub-micron era, the properties of a large cache are heavily impacted by the choice of the interconnect model [9, 10].”
Cambricon-X: An accelerator for sparse neural networks (2016, background): “0 to estimate the energy consumption of DRAM accesses [35].”
CACTI 7 (2017, positive): “Whereas earlier versions of CACTI [Muralimanohar et al. 2007] have focused on cache hierarchies, the new version adds a new capability—the modeling of off-chip memory interconnects.”
Hybrid cache architecture with disparate memory technologies (2009, methodology): “Optimizing NUCA Organizations and Wiring Alternatives for Large Caches with CACTI 6.0.”