CACTI 6.0: A Tool to Model Large Caches

By Naveen Muralimanohar, Rajeev Balasubramonian, N. Jouppi. 2009

1,102 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/3364bc50921a9566d61ef8cb73baa82341725e4b

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Citations in the corpus

• CompAct (2019, methodology): “Our energy and power estimates for all memory components are based on HP CACTI 7.0 using 45 nm technology node and a low power process [25].”
• EIE: Efficient Inference Engine on Compressed Deep Neural Network (2016, methodology): “We used Cacti [25] to get SRAM area and energy numbers.”
• DRISA: A DRAM-based Reconfigurable In-Situ Accelerator (2017, methodology): “The eDRAM and SRAM are calculated from CACTI [65].”
• RecNMP: Accelerating Personalized Recommendation with Near-Memory Processing (2019, methodology): “The area and power numbers are derived from Synopsys Design Compiler (DC) for the arithmetic and control logic and Cacti [49] for SRAM memory (i.e. RankCache).”
• Incremental Learning in Deep Convolutional Neural Networks Using Partial Network Sharing (2017, methodology): “The memory module in our baseline was modelled using CACTI [16], in 32nm technology library, to estimate the corresponding energy consumption.”
• Understanding Reuse, Performance, and Hardware Cost of DNN Dataflow: A Data-Centric Approach (2018, methodology): “For energy estimation, we multiply activity counts with base energy values from Cacti [29] simulation (28nm, 2KB L1 scratchpad, and 1MB shared L2 buffer).”
• GOBO: Quantizing Attention-Based NLP Models for Low Latency and Energy Efficient Inference (2020, methodology): “Area and power for the on-chip memories are modeled by CACTI [34].”
• PIM-enabled instructions: A low-overhead, locality-aware processing-in-memory architecture (2015, background): “5 [37] to model energy consumption of on-chip caches, the PIM directory, and”
• DeepStore: In-Storage Acceleration for Intelligent Queries (2019, background): “5 [74] to estimate energy utilization of all SRAMs in the 32nm technology node.”
• LightNN: Filling the Gap between Conventional Deep Neural Networks and Binarized Networks (2017, methodology): “Cacti [27] is used to obtain the power of memory accesses and registers.”
• Relaxing non-volatility for fast and energy-efficient STT-RAM caches (2011, methodology): “5, the current version of a widely used tool for estimating the latency, area, and energy consumption of caches and memories [14], [21].”
• SpAtten: Efficient Sparse Attention Architecture with Cascade Token and Head Pruning (2020, methodology): “We also obtain the width, size, and the number of read/write of each SRAM and FIFO from the simulator and use CACTI [18] to estimate the energy and area of SRAMs and FIFOs.”