Scaling the bandwidth wall: challenges in and avenues for CMP scaling
By Brian Rogers, Anil Krishna, Gordon B. Bell, K. V. Vu, Xiaowei Jiang, Yan Solihin. International Symposium on Computer Architecture, 2009
310 citations recorded by the source corpus.
Subfields: Computer Networks and Communications, Hardware and Architecture
View Paper: https://www.semanticscholar.org/paper/0e2efda23894526e869e57cb81c76de22f6a8d20
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In Computer Networks and Communications
In Hardware and Architecture
Citations in the corpus
- TOP-PIM: throughput-oriented programmable processing in memory (2014, background): “Processors have steadily become more computationally capable and energy efficient, but improvements in bandwidth, latency and energy consumption of off-chip memory accesses have not kept pace with advances in processor architectures [36, 40].”