Error patterns in MLC NAND flash memory: Measurement, characterization, and analysis
By Yu Cai, Erich F. Haratsch, Onur Mutlu, K. Mai. Design, Automation and Test in Europe, 2012
423 citations recorded by the source corpus.
Subfields: Computational Theory and Mathematics, Computer Networks and Communications
View Paper: https://www.semanticscholar.org/paper/b3765a4d8706880215a1c3ac43c53e07d8d5f5a7
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In Computational Theory and Mathematics
In Computer Networks and Communications
Citations in the corpus
- Data retention in MLC NAND flash memory: Characterization, optimization, and recovery (2015, methodology): “Prior works [2][5] characterize NAND flash data retention, but only in terms of RBER.”
- SCORE (2018, background): “Cai et al. [10] characterized the error patterns of planar flash memory.”
- SSD Failures in Datacenters: What? When? and Why? (2016, background): “Several works have examined failure trends of raw flash chips [4, 6, 8, 10, 15, 16, 26, 32].”
- Flipping bits in memory without accessing them: An experimental study of DRAM disturbance errors (2014, background): “Disturbance errors are a general class of reliability problem that a✏icts not only DRAM, but also other memory and storage technologies: SRAM [16, 26, 40], flash [10, 12, 13, 19, 25], and hard-disk [36, 63, 68].”
- Approximate storage in solid-state memories (2013, methodology): “We choose a conservative baseline raw bit error rate (RBER) of 10−8, which comports with RBERs observed in Flash memory today [4, 25].”
- RowHammer: A Retrospective (2019, background): “All scaled memory technologies, including SRAM [62], [93], [120], flash [42], [45], [46], [50]–[53], [67], [165], [166], [169], [212], and hard disk drives [109], [232], [247], exhibit such disturbance problems.”
- Retrospective: Flipping Bits in Memory Without Accessing Them: An Experimental Study of DRAM Disturbance Errors (2023, neutral): “Disturbance errors are a general class of reliability problem that a ffl icts not only DRAM, but also other memory and storage technologies: SRAM [16, 26, 40], flash [10, 12, 13, 19, 25], and hard-disk [36, 63, 68].”
- Memory scaling: A systems architecture perspective (2013, background): “We have recently experimentally characterized complex flash errors that occur at 30-40nm flash technologies [9], categorizing them into four types: retention errors, program interference errors, read errors, and erase errors.”