High-performance carbon nanotube field-effect transistor with tunable polarities

By Yu-ming Lin, Joerg Appenzeller, Joachim Knoch, Phaedon Avouris. IEEE transactions on nanotechnology, 2005

476 citations recorded by the source corpus.

State-of-the-art carbon nanotube field-effect transistors (CNFETs) behave as Schottky-barrier-modulated transistors. It is known that vertical scaling of the gate oxide significantly improves the performance of these devices. However, decreasing the oxide thickness also results in pronounced ambipolar transistor characteristics and increased drain leakage currents. Using a novel device concept, we have fabricated high-performance enhancement-mode CNFETs exhibiting n- or p-type unipolar behavior, tunable by electrostatic and/or chemical doping, with excellent OFF-state performance and a steep subthreshold swing (S=63 mV/dec). The device design allows for aggressive oxide thickness and gate-length scaling while maintaining the desired device characteristics.

Subfields: Biomedical Engineering, Materials Chemistry

View Paper: https://www.semanticscholar.org/paper/b2bf8bad82efba677ccbd1551d4d51d937aeadf0

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Citations in the corpus

CNTFET-Based Design of Ternary Logic Gates and Arithmetic Circuits (2011, background): “otube (CNT) FET (CNTFET) is a promising alternative to the bulk silicon transistor for low-power and high-performance design due to its ballistic transport and low OFF-current properties [8]–[12].”
High-performance electronics using dense, perfectly aligned arrays of single-walled carbon nanotubes. (2007, background): “77" language="eng" relation="no" origsrc="yes"> Fundamental studies of charge transport through individual SWNTs reveal remarkable room-temperature properties, including mobilities more than ten times larger than silicon, current-carrying capacities as high as 19 A cm and ideal subthre”
Carbon Nanotubes for High-Performance Electronics - Progress and Prospect (2008, unknown): “A recent example of a CNFET is shown in Fig. 4. The design that has been adopted with the gate on top of [27] and underneath the nanotube [28], [ 29 ] resembles to a large extent the CNFET sketched in Fig. 3. Conventional looking device characteristics are obtained when the silicon gate is biased su”
Carbon-based electronics. (2007, methodology): “In one case, a double-gated CNT was used where the gates near the contacts selectively thinned the Schottky barriers, while a central gate was independently used to switch the bulk of the CNTFET (ref”
Comparing carbon nanotube transistors - the ideal choice: a novel tunneling device design (2005, background): “Thus doping of CNs requires controlling the electrostatics of the nanotube environment by molecules [13], additional gates [14] or metal ions [15] instead.”
High-performance dual-gate carbon nanotube FETs with 40-nm gate length (2005, background): “dopants [16], [17] instead of the Si back gate in order to further reduce the parasitic capacitance due to the conducting substrate.”