Covert and Side Channels Due to Processor Architecture

By Zhenghong Wang, Ruby B. Lee. Asia-Pacific Computer Systems Architecture Conference, 2006

303 citations recorded by the source corpus.

View Paper: https://www.semanticscholar.org/paper/43408dcf65adb2ae94bf065dfa1ca6261b0e19d5

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In Artificial Intelligence

Citations in the corpus

Software Grand Exposure: SGX Cache Attacks Are Practical (2017, background): “Respective techniques largely fall into two categories, the ﬁrst one relying on access randomization within cache memory [51, 52, 31, 35], and the second one using cache partitioning, so that security sensitive code never shares caches with untrusted processes [40, 41, 50, 51, 17].”
Effective and Efficient Malware Detection at the End Host (2009, background): “These signatures can either be crafted manually [20, 33] or automatically extracted by analyzing a pool of malicious payloads [32, 41, 49].”
CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization (2015, background): “Past vulnerabilities in language TCBs have been substantial (e.g., vulnerabilities in Java Virtual Machines), and must be considered for our model as well: errors in compilers, low-level memory allocators, parsing of object files, garbage collectors, and so on, are pertinent.”
Jump over ASLR: Attacking branch predictors to bypass ASLR (2016, background): “A large number of prior works studied different aspects of side channels in instruction and data caches [55], [56], [57], [58], [59].”
Whispers in the Hyper-space: High-speed Covert Channel Attacks in the Cloud (2012, background): “Coupled with the fact that the cloud vendors impose non-trivial extra service charges for providing physical isolation, one might be tempted to disregard the concerns of covert channels as only precautionary, and choose the lower cost solutions.”
A Hardware Design Language for Timing-Sensitive Information-Flow Security (2015, background): “Attacks have also been shown that exploit timing channels arising from other components: instruction and data caches [2], branch predictors and branch target buffers [3], and shared functional units [44].”
Wait a Minute! A fast, Cross-VM Attack on AES (2014, background): “As suggested by Wang and Lee [30] the OS can enforce a smart process scheduling method to protect critical processes with sensitive data and make sure that they are never shared between VMs.”
HomeAlone: Co-residency Detection in the Cloud via Side-Channel Analysis (2011, unknown): “Besides the data cache, other architectural side channels have been exploited in cryptanalysis; as mentioned above, these include the instruction cache [4], the branch target cache [6], [7], and shared functional units [46], [9].”
Context-Sensitive Fencing: Securing Speculative Execution via Microcode Customization (2019, background): “mizations such as caches, branch speculation, memory disambiguation, and even DVFS, through side-channels such as memory bus activity [4], power consumption characteristics [8], branch access patterns [2, 29], faults [47, 40], acoustics [33, 32], electromagnetic effects [30], functional unit timing ”
SgxPectre: Stealing Intel Secrets from SGX Enclaves Via Speculative Execution (2018, background): “ode. Side-channel defenses. Existing countermeasures to side-channel attacks can be categorized into three classes: hardware solutions, system solutions, and application solutions. Hardware solutions [76, 77, 21, 47, 45, 18]requiremodiﬁcationoftheprocessors,whicharetypically effective, but are limit”
Information leakage detection in distributed systems using software agents (2009, unknown): “According to a 2006 Global Security survey by Deloitte, insider fraud and information leakage contribute 28 percent Yung-Chuan Lee is a PhD candidate and Computer Information Specialist with the Department of Computer Science, Southern Illinois University, Carbondale, Illinois, USA (email: ylee@cs.s”
SgxPectre Attacks: Leaking Enclave Secrets via Speculative Execution (2018, background): “ode. Side-channel defenses. Existing countermeasures to side-channel attacks can be categorized into three classes: hardware solutions, system solutions, and application solutions. Hardware solutions [76, 77, 21, 47, 45, 18]requiremodiﬁcationoftheprocessors,whicharetypically effective, but are limit”