CHERI: A Hybrid Capability-System Architecture for Scalable Software Compartmentalization

By R. Watson, Jonathan Woodruff, P. Neumann, Simon W. Moore, Jonathan Anderson, D. Chisnall, Nirav H. Dave, Brooks Davis, Khilan Gudka, B. Laurie and 5 more. IEEE Symposium on Security and Privacy, 2015

357 citations recorded by the source corpus.

CHERI extends a conventional RISC Instruction-Set Architecture, compiler, and operating system to support fine-grained, capability-based memory protection to mitigate memory-related vulnerabilities in C-language TCBs. We describe how CHERI capabilities can also underpin a hardware-software object-capability model for application compartmentalization that can mitigate broader classes of attack. Prototyped as an extension to the open-source 64-bit BERI RISC FPGA soft-core processor, Free BSD operating system, and LLVM compiler, we demonstrate multiple orders-of-magnitude improvement in scalability, simplified programmability, and resulting tangible security benefits as compared to compartmentalization based on pure Memory-Management Unit (MMU) designs. We evaluate incrementally deployable CHERI-based compartmentalization using several real-world UNIX libraries and applications.

Subfields: Artificial Intelligence, Computer Networks and Communications, Signal Processing

View Paper: https://www.semanticscholar.org/paper/ea3bad08b37e5275cd16d220a2f4497871795df4