On the go with SONOS
By M. White, D. Adams, J. Bu. 2000
392 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering, Materials Chemistry
View Paper: https://www.semanticscholar.org/paper/361154848f19d83c45710c2c3e9de3c1d7e71a26
How researchers see this paper
The researchers whose trusted networks rank it highest, strongest advocate first. Every researcher gets a different order.
In Electrical and Electronic Engineering
- A. Padilla
- Tseung-Yuen Tseng
- Michele M. Franceschini
- B. Jackson
- J. Campbell Scott
- Bülent N. Kurdi
- Matthew J. Breitwisch
- Rohit S. Shenoy
In Materials Chemistry
- S. Sze
- A. Padilla
- Tseung-Yuen Tseng
- Michele M. Franceschini
- B. Jackson
- J. S. Meena
- Bülent N. Kurdi
- Matthew J. Breitwisch
Citations in the corpus
- Phase change memory technology (2010, background): “Many alternative cell designs were proposed, typically involving replacement of the floating polysilicon gate by some type of charge-trapping layer, such as the Silicon Nitride at the center of the Silicon-Oxide-Nitride-Oxide-Semiconductor (SONOS) cell structure[11].”
- Radiation effects and hardening of MOS technology: devices and circuits (2003, methodology): “Except for niche applications, like radiation-hardened cryogenic MOS [244] and nonvolatile memory [245] (where dual dielectric films of silicon nitride over silicon dioxide are used), nearly all generations of MOS technology use silicon dioxide gate dielectric films.”
- BE-SONOS: A bandgap engineered SONOS with excellent performance and reliability (2005, background): “Nitride-trapping device consists of two main types: SONOS [1] which uses channel program/erase, and NROM [2] which store charges locally.”
- Overview of emerging nonvolatile memory technologies (2014, background): “In order to solve the scaling issue of the FG memory, the SONOS memory has been proposed as a Flash technology since the 1980s [68,69].”
- Overview of candidate device technologies for storage-class memory (2008, background): “One obvious alternative is to replace the floating gate with a chargetrapping layer, such as the silicon nitride in the SONOS cell structure [19].”