Modeling and minimization of PMOS NBTI effect for robust nanometer design
By Rakesh Vattikonda, Wenping Wang, Yu Cao. 2006 43rd ACM/IEEE Design Automation Conference, 2006
504 citations recorded by the source corpus.
Subfields: Electrical and Electronic Engineering
View Paper: https://www.semanticscholar.org/paper/0d01f11df48c12ca1b45c0ae907fc9cd65ff9255
How researchers see this paper
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In Electrical and Electronic Engineering
- Wenping Wang
- Sarma B. K. Vrudhula
- Sarvesh Bhardwaj
- Frank Liu
- Shengqi Yang
- Yu Cao
- Rakesh Vattikonda
- Carole-Jean Wu
Citations in the corpus
- The Impact of NBTI Effect on Combinational Circuit: Modeling, Simulation, and Analysis (2010, background): “In the reaction phase, some Si–H bonds at the Si–SiO interface are broken under the vertical electrical stress [9], [14], [15].”
- Predictive Modeling of the NBTI Effect for Reliable Design (2006, background): “A is linearly proportional to the hole density and has an exponential dependence on temperature (T ) and the electric field (Eox = (VGS − Vth)/tox) [9]”
- Compact Modeling and Simulation of Circuit Reliability for 65-nm CMOS Technology (2007, background): “It is also proportional to the density of reaction species, namely holes or hot electrons [4], [7], [29].”