M. Straayer

IEEE Journal of Solid-State Circuits · 2008–2009

A researcher in the Science corpus: 3 papers; trusts 2 researchers and is trusted by 4 researchers here, as inferred from the citation graph.

Whom M. Straayer trusts overall

Their strongest outbound trust, strongest first, inferred from their citations.

  1. Minjae Lee
  2. Asad A. Abidi

Who trusts M. Straayer overall

  1. Jaewook Kim
  2. Taekwang Jang
  3. Young-Gyu Yoon

Papers from M. Straayer's perspective

Ordered by how strongly the researchers M. Straayer trusts endorse each paper. Same corpus, a different order for every researcher.

  1. 1.3 V 20 ps time-to-digital converter for frequency synthesis in 90-nm CMOS (IEEE Transactions on Circuits and Systems - II - Express Briefs)
  2. A 9 b, 1.25 ps Resolution Coarse–Fine Time-to-Digital Converter in 90 nm CMOS that Amplifies a Time Residue (IEEE Journal of Solid-State Circuits)
  3. All-digital PLL and transmitter for mobile phones (IEEE Journal of Solid-State Circuits)
  4. A high-resolution CMOS time-to-digital converter utilizing a Vernier delay line (IEEE Journal of Solid-State Circuits)
  5. All-digital TX frequency synthesizer and discrete-time receiver for Bluetooth radio in 130-nm CMOS (IEEE Journal of Solid-State Circuits)
  6. Wide-band CMOS low-noise amplifier exploiting thermal noise canceling (IEEE Journal of Solid-State Circuits)
  7. A 12 b 75 MS/s pipelined ADC using open-loop residue amplification (2003 IEEE International Solid-State Circuits Conference, 2003. Digest of Technical Papers. ISSCC.)
  8. Analog-to-digital converter survey and analysis
  9. A 3-10-GHz low-noise amplifier with wideband LC-ladder matching network (IEEE Journal of Solid-State Circuits)
  10. A 1.75 GHz highly-integrated narrow-band CMOS transmitter with harmonic-rejection mixers (2001 IEEE International Solid-State Circuits Conference. Digest of Technical Papers. ISSCC (Cat. No.01CH37177))

Their papers